How It Works
Well the ISR Dispatcher intercepts all the interrupts occuring in the system, that is CPU interrupts, hardware interrupts, and software interrupts. Most of the software interrupts are disabled by default, but may for some reason or the other be activated.
Hardware
IRQs are in version 0.1 mapped to interrupts 0x50 to 0x5Fh. An thus the interrupt service routine strings are placed here.
CPU interrupts are in version 0.1 mapped to interrupts 0x00 to 0x1Fh. Calls to those of them unused by Intel will be logged by the ISR Dispatcher. Among other ISR routines in the CPU category are the one responsable for swapping pages into memory, if paging is enabled, and the one for starting the debugger.
In case a disabled software interrupt is called, the ISR Dispatcher can log the event for further investigation.
Multiple IRQ Sources
In case of multiple sources for the
IRQ signal, the ISR Dispatcher will execute a serie of interrupt service routines. Each will check whether or not it was its hardware that send the
HIL Manager, and finally end the interrupt call.
Have a routine fullfilled the request, it leaves a positive exit value. The ISR Dispatcher will then stop the executing the string of interrupt service routines and end the interrupt call.
ISR Dispatcher Configuration
The ISR Dispatcher is part of the
HIL Manager, and thus configured by the manager.