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Interrupt Request Channels

Using a Intel 8259 PIC compatible chip


The IBM PC has 16 different Interrupt Request (IRQ) lines. These are used to signal the processor when an adapter/component needs attention. Original the PC only had 8 IRQ lines, but a second Programmable Interrupt Controller was added in a cascade configuration, and thats why only 15 of the 16 different IRQ lines are available.

IRQ Usage

This is a list showing what the different IRQ lines in the system is going to be used for. Its also listed what the different IRQ are normally used for, and what Interrupt they are going to be routed to. Here is the list:

IRQ Usage
IRQ IDT Normaly Used For Most Likely To Be Used For
NMI102hMemory parity controlMemory parity control
252hThe PIC-2 is cascaded to this IRQThe PIC-2 cascade
IRQ 8-15 is connected to PIC-2. When PIC-2 receives an interrupt request it uses its own IRQ line to signal PIC-1. When the lowest IRQ has the highest priority, any interrupt request (8-15) coming through the PIC-2 cascade must have a higher priority than interrupt request from 3 to 7. This table has the highest IRQ priority on the top.
853hRTCAvailable for PnP Configuration
954hNetworkAvailable for PnP Configuration
1055hQuaternary IDEAvailable for PnP Configuration
1156hQuaternary IDE / Tertiary IDEAvailable for PnP Configuration
1257hTertiary IDEAvailable for PnP Configuration
1358hExceptions in FPU calculationsAvailable for PnP Configuration
1459hPrimary IDEAvailable for PnP Configuration
155AhSecondary IDEAvailable for PnP Configuration
35BhCOM 2Available for PnP Configuration
45ChCOM 1Available for PnP Configuration
55DhLPTAvailable for PnP Configuration
65EhFloppyAvailable for PnP Configuration
75FhLPTAvailable for PnP Configuration

PnP IRQ Priority

This is a list of how the different type of adapters are assigned the available IRQ lines. These adapters in the top will get the IRQ lines with the highest priority:


  1. The NMI signal is used to request the CPU assistance when something that can't be ignored happens. Ex. a memory parity error. The NMI signal line can't be ignored by the CPU. The NMI line is unique and therefore don't use any IRQ lines.