NMI1 | 02h | Memory parity control | Memory parity control |
0 | 50h | Systemtiming | Systemtiming |
1 | 51h | Keyboard | Keyboard |
2 | 52h | The PIC-2 is cascaded to this IRQ | The PIC-2 cascade |
IRQ 8-15 is connected to PIC-2. When PIC-2 receives an interrupt request it uses its own IRQ line to signal PIC-1. When the lowest IRQ has the highest priority, any interrupt request (8-15) coming through the PIC-2 cascade must have a higher priority than interrupt request from 3 to 7. This table has the highest IRQ priority on the top.
|
8 | 53h | RTC | Available for PnP Configuration |
9 | 54h | Network | Available for PnP Configuration |
10 | 55h | Quaternary IDE | Available for PnP Configuration |
11 | 56h | Quaternary IDE / Tertiary IDE | Available for PnP Configuration |
12 | 57h | Tertiary IDE | Available for PnP Configuration |
13 | 58h | Exceptions in FPU calculations | Available for PnP Configuration |
14 | 59h | Primary IDE | Available for PnP Configuration |
15 | 5Ah | Secondary IDE | Available for PnP Configuration |
3 | 5Bh | COM 2 | Available for PnP Configuration |
4 | 5Ch | COM 1 | Available for PnP Configuration |
5 | 5Dh | LPT | Available for PnP Configuration |
6 | 5Eh | Floppy | Available for PnP Configuration |
7 | 5Fh | LPT | Available for PnP Configuration |