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DMA

Using Intel 8237 DMA compatible controlchip


Introduction

Each of the 7 DMA channels has 4 registers assigned to it. The first hold a 16-bit value for the address in memory and the second hold a 16-bit value for the numbers of Bytes (8-bit channels) / Words (16-bit channels). The last two are used to monitor the DMA transfer.


DMA Usage

This is a list showing what the different DMA channels in the system is going to be used for. Its also listed what the different DMA channels normally are used for. Here is the list:

DMA Usage
Channel Size Normaly Used For Most Likely To Be Used For
08 bitUnknown8 bit requested transfers
18 bitSound8 bit requested transfers
28 bitFloppy Transfers8 bit requested transfers
38 bitSound or LPT/ECP8 bit requested transfers
416 bitDMA-1 Cascaded ThroughDMA-1 Cascade
516 bitUnknown16 bit requested transfers
616 bitUnknown16 bit requested transfers
716 bitSound16 bit requested transfers


8 Bit DMA Usage

The four 8 bit DMA channels can be used with a variaty of adapters, but in general the DMA channels will only be active when needed. That means that no adapter has a specific DMA channel all the time. The 8-bit DMA channels will be used with:


16 Bit DMA Usage

The three 16 bit DMA channels can also be used with a variaty of adapters, but in general the DMA channels will only be active when needed. That means that no adapter has a specific DMA channel all the time. The 16-bit DMA channels will be used with:


Additional Information

The DMA channels has several different operating modes, and a couple of them can be joined together to allow direct datatransmissions without use of the CPU.

The 8-bit channels (0-3) can have base address in the memory area from 0 to 1 Mb. And the 16-bit channels (4 - 7) can have base address from 0 to 16 Mb memory. The last 4 or 7 bits used to form the memory address comes from the DMA pageregisters. DMA channel 0-3 can address 64 Kbyte of memory where channel 4-7 can address 128 Kbyte of memory.


A Protocol Example

The following is a rude example of the communication protocol used when DMA is being used to transfer data from an adapter to memory:
  1. When the transfer begins the DMA channels registers are loaded with the correct address base and counter value.
  2. The adapter is told to begin the transfer.
  3. When adapter has the first data ready it signals the DMA controlchip.
  4. The DMA controlchip ask the CPU for ownership over the data bus.
  5. When ownership is granted, the DMA chip signals back to the adapter to start sending.
  6. At the same time the DMA chip puts the base address on the address bus.
  7. The adapter puts its data on the data bus. And the the RAM circuits automaticly reads the data.
  8. The DMA chip, controls the transmission. And sends a TC - Transmission Complete when the transmission is finished (ie. when the counter value changes from 0000h to FFFFh.
  9. When the adapter senses the TC signal it uses its IRQ, to inform the code which requested the DMA transfer that it has finished.
  10. The program can then check to see if the transmission has run smoothly.